An ever-increasing demand for computer performance has led to faster processors and greater levels of parallelism. High-end computers now boast multiple processors, each with multiple cores. This parallelism allows multiple processes to run in parallel on respective cores of the same or different processors. To maximize performance, processes should be divided among cores and processors as evenly as possible.
However, power consumption is an increasing concern for modern processors. Power consumption can be reduced by packing processes onto as few processors as possible so that some processors can be shut down or put in a low-power state. Taking this approach to the extreme can leave little headroom in a processor when processing needs suddenly increase; in such cases, the result can be a performance hit.
Some modern processors, e.g., the Xeon processor available from Intel Corporation and the Opteron processor available from Advanced Micro Devices, Inc., have reduced performance states that conserve power, providing the option of reducing power consumption while still making computer cycles available for processing. In some such processors, the lower power states must be shared by all cores on a processor, although different processors in a multi-processor system can assume different power states. The challenge is to find an allocation of processes to cores that provides a favorable tradeoff between power and performance given that what constitutes a favorable tradeoff can depend on the processes involved.
Herein, related art is described to facilitate understanding of the invention. Related art labeled “prior art” is admitted prior art; related art not labeled “prior art” is not admitted prior art.